Analog ip verification, including schematic simulation, post layout simulation, chip performance test, ate test for mass production, etc 對(duì)芯片中的模擬ip進(jìn)行驗(yàn)證,包括原理設(shè)計(jì)仿真、布線后的后仿真、實(shí)際芯片相關(guān)部分的性能測(cè)試、量產(chǎn)測(cè)試等等。
In charge of the analog ip verification, including schematic simulation, post layout simulation, chip performance test, ate test for mass production, etc 對(duì)芯片中的模擬ip進(jìn)行驗(yàn)證,包括原理設(shè)計(jì)仿真、布線后的后仿真、實(shí)際芯片相關(guān)部分的性能測(cè)試、量產(chǎn)測(cè)試等等。